Field Effect Transistor

In the Bipolar Junction Transistor  tutorials, we saw that the output Collector current is determined by the amount of current flowing into the Base terminal of the device and thereby making the Bipolar Transistor a CURRENT operated device. The Field Effect Transistor, or simply FET however, use the voltage that is applied to their input terminal to control the output current, since their operation relies on the electric field (hence the name field effect) generated by the input voltage. This then makes the Field Effect Transistor a VOLTAGE operated device.

The Field Effect Transistor is a unipolar device that has very similar properties to those of the Bipolar Transistor ie, high efficiency, instant operation, robust and cheap, and they can be used in most circuit applications that use the equivalent Bipolar Junction Transistors, (BJT). They can be made much smaller than an equivalent BJT transistor and along with their low power consumption and dissipation make them ideal for use in integrated circuits such as the CMOS range of chips.

We remember from the previous tutorials that there are two basic types of Bipolar Transistor construction,NPN and PNP, which basically describes the physical arrangement of the P-type and N-type semiconductor materials from which they are made. There are also two basic types of Field Effect Transistor, N-channel and P-channel. As their name implies, Bipolar Transistors are "Bipolar" devices because they operate with both types of charge carriers, Holes and Electrons. The Field Effect Transistor on the other hand is a "Unipolar" device that depends only on the conduction of Electrons (N-channel) or Holes (P-channel).

The Field Effect Transistor has one major advantage over its standard bipolar transistor cousins, in that their input impedance is very high, (Thousands of Ohms) making them very sensitive to input signals, but this high sensitivity also means that they can be easily damaged by static electricity. There are two main types of field effect transistor, the Junction Field Effect Transistor or JFET and the Insulated-gate Field Effect Transistor or IGFET), which is more commonly known as the standard Metal Oxide Semiconductor Field Effect Transistor or MOSFET for short.

The Junction Field Effect Transistor

We saw previously that a bipolar junction transistor is constructed using two PN junctions in the main current path between the Emitter and the Collector terminals. The Field Effect Transistor has no junctions but instead has a narrow "Channel" of N-type or P-type silicon with electrical connections at either end commonly called the DRAIN and the SOURCE respectively. Both P-channel and N-channel FET's are available. Within this channel there is a third connection which is called the GATE and this can also be a P or N-type material forming a PN junction and these connections are compared below.

Bipolar Transistor	Field Effect Transistor
Emitter - (E)	Source - (S)
Base - (B)	Gate - (G)
Collector - (C)	Drain - (D)

The semiconductor "Channel" of the Junction Field Effect Transistor is a resistive path through which a voltage V_ds causes a current I_d to flow. A voltage gradient is thus formed down the length of the channel with this voltage becoming less positive as we go from the drain terminal to the source terminal. The PN junction therefore has a high reverse bias at the drain terminal and a lower reverse bias at the sourceterminal. This bias causes a "depletion layer" to be formed within the channel and whose width increases with the bias. FET's control the current flow through them between the drain and source terminals by controlling the voltage applied to the gate terminal. In an N-channel JFET this gate voltage is negative while for a P-channel JFET the gate voltage is positive.

Bias arrangement for an N-channel JFET and corresponding circuit symbols.

The cross sectional diagram above shows an N-type semiconductor channel with a P-type region called the gate diffused into the N-type channel forming a reverse biased PN junction and its this junction which forms the depletion layer around the gate area. This depletion layer restricts the current flow through the channel by reducing its effective width and thus increasing the overall resistance of the channel.

When the gate voltage V_g is equal to 0V and a small external voltage (V_ds) is applied between the drainand the source maximum current (I_d) will flow through the channel slightly restricted by the small depletion layer. If a negative voltage (V_gs) is now applied to the gate the size of the depletion layer begins to increase reducing the overall effective area of the channel and thus reducing the current flowing through it, a sort of "squeezing" effect. As the gate voltage (V_gs) is made more negative, the width of the channel decreases until no more current flows between the drain and the source and the FET is said to be "pinched-off". In this pinch-off region the gate voltage, V_gs controls the channel current and V_ds has little or no effect. The result is that the FET acts more like a voltage controlled resistor which has zero resistance when V_gs = 0 and maximum "ON" resistance (R_ds) when the gate voltage is very negative.

Output characteristic voltage-current curves of a typical junction FET.

The voltage V_gs applied to the gate controls the current flowing between the drain and the sourceterminals. V_gs refers to the voltage applied between the gate and the source while V_ds refers to the voltage applied between the drain and the source. Because a Field Effect Transistor is a VOLTAGE controlled device, "NO current flows into the gate!" then the source current (I_s) flowing out of the device equals the drain current flowing into it and therefore (I_d = I_s).

The characteristics curves example shown above, shows the four different regions of operation for a JFET and these are given as:

• Ohmic Region - The depletion layer of the channel is very small and the JFET acts like a variable resistor.
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• Cut-off Region - The gate voltage is sufficient to cause the JFET to act as an open circuit as the channel resistance is at maximum.
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• Saturation or Active Region - The JFET becomes a good conductor and is controlled by the gate-source voltage, (V_gs) while the drain-source voltage, (V_ds) has little or no effect.
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• Breakdown Region - The voltage between the drain and source, (V_ds) is high enough to causes the JFET's resistive channel to break down and pass current.

The control of the drain current by a negative gate potential makes the Junction Field Effect Transistoruseful as a switch and it is essential that the gate voltage is never positive for an N-channel JFET as the channel current will flow to the gate and not the drain resulting in damage to the JFET. The principals of operation for a P-channel JFET are the same as for the N-channel JFET, except that the polarity of the voltages need to be reversed.

Freddy Vallenilla EES Sec 2